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Title: | FPGA design of the fast decoder for burst errors correction |
Authors: | Mytsko, Evgeniy Aleksandrovich Malchukov, Andrey Nikolaevich Zoev, Ivan Vladimirovich Ryzhova, Svetlana Evgenievna Kim, Valery Lvovich |
Keywords: | дизайн; декодеры; коррекция; ошибки; передача данных; полиномы; ПЛИС; производительность |
Issue Date: | 2017 |
Publisher: | IOP Publishing |
Citation: | FPGA design of the fast decoder for burst errors correction / E. A. Mytsko [et al.] // Journal of Physics: Conference Series. — 2017. — Vol. 803 : Information Technologies in Business and Industry (ITBI2016) : International Conference, 21–26 September 2016, Tomsk, Russian Federation : [proceedings]. — [012105, 6 p.]. |
Abstract: | The paper is about FPGA design of the fast single stage decoder for correcting burst errors during data transmission. The decoder allows correcting burst errors with 3 bits for a 15 bit codeword and a 7 bit check unit. The description of a generator polynomial search algorithm for building error-correcting codes was represented. The module structure of the decoder was designed for FPGA implementation. There are modules, such as remainder, check_pattern, decoder2, implemented by asynchronous combinational circuits without memory elements, and they process each codeword shift in parallel. Proposed implementation allows getting high performance about ~20 ns. |
URI: | http://earchive.tpu.ru/handle/11683/38166 |
Appears in Collections: | Материалы конференций |
Files in This Item:
File | Description | Size | Format | |
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dx.doi.org-10.1088-1742-6596-803-1-012105.pdf | 1 MB | Adobe PDF | View/Open |
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